Jung Ho Ahn

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Picture of Jung Ho Ahn

Research Interests

Computer architecture, datacenter platforms, fully homomorphic encryption, parallel computing, memory systems, interconnection networks, nanophotonic architecture, near-data processing, big data, and machine learning platforms.

Professional Experiences

  • Professor, GSCST, SNU (Sep 2018 –)
    Associate Professor, GSCST, SNU (Sep 2013 – Aug 2018)
    Assistant Professor, GSCST, SNU (Sep 2009 – Aug 2013)
  • Dean, GSCST, SNU (Sep 2022 – Aug 2024)
  • Board Member, SK Telecom Co., Ltd. (Mar 2017 – Mar 2023)
  • Visiting Scholar, Samsung Electronics (Sep 2024 – )
  • Visiting Scholar, Google Inc. (2016)
  • Senior Research Scientist, Exascale Computing Lab, HP Labs (2008 – Aug 2009)
    Research Scientist, Exascale Computing Lab, HP Labs (Feb 2007 – 2008)
  • Hardware Design Engineer, Stream Processors Inc. (Jun 2005 – Sep 2005)

Honors & Awards

Current Students

For my current students, please check the homepage of my research group (SCALE @ SNU).

Former Students

Ph.D. [ name (year) @ {first, current} affiliation ]

  1. Seongil O (2015) @ {Samsung Electronics}
  2. Young Hoon Son (2016) @ {Samsung Electronics}
  3. Daejin Jung (2018) @ {Samsung Electronics}
  4. Yuhwan Ro (2018) @ {Samsung Electronics}
  5. Sukhan Lee (2019) @ {Samsung Electronics}
  6. Eojin Lee (2020) @ {Samsung, Inha University}
  7. Wonkyung Jung (2022) @ {Samsung Electronics}
  8. Byeongho Kim (2022) @ {Samsung Electronics}
  9. Deok-Jae Oh (2022) @ {Samsung Electronics}
  10. Sunjung Lee (2022) @ {Samsung Electronics}
  11. Hailong Li (2023) @ {Samsung Electronics}
  12. Yaebin Moon (2024) @ {Samsung Electronics}
  13. Jaewan Choi (2024) @ {Samsung Electronics}

M.S. [ name (year) @ {first, current} affiliation ]

  1. Sungwoo Choo (2012) @ {NAVER, Amazon Web Service}
  2. DongYul Lee (2013) @ {Samsung Electronics}
  3. Jaeyoon Choi (2015) @ {Samsung Electronics}
  4. Sanghyuk Kwon (2015) @ {Samsung Electronics}
  5. Sangmin Lee (2016) @ {Samsung Electronics}
  6. Jaekyun Shim (2016) @ {ATTO Research, }
  7. Sanghoon Oh (2016) @ {Samsung Electronics}
  8. Hyunyoon Cho (2017) @ {Samsung Electronics}
  9. Seulgi Seo (2018) @ {Samsung Electronics}
  10. Minchul Sung (2018) @ {SK Hynix}
  11. Chulho Kang (2019) @ {Samsung Electronics}
  12. Ingab Kang (2020) @ {University of Michigan}
  13. Hweesoo Kim (2021) @ {Samsung Electronics}
  14. Hyuntae Jung (2022) @ {LG Innotek, Samsung Electronics}
  15. Dokyu Ham (2023) @ {Samsung Electronics}
  16. Seunghwan Hwang (2023) @ {Samsung Electronics}
  17. Donghwan Kim (2024) @ {Pennsylvania State University}

Education

  • Stanford University, California. Apr, 2007
    Ph.D. Electrical Engineering,
    Advisor: Professor William J. Dally
    Thesis: “Memory and Control Organizations of Stream Processors”
    GPA: 4.01 / 4.30
  • Stanford University, California. Apr, 2002
    M.S. Electrical Engineering,
    GPA: 3.98 / 4.30
  • SNU, Republic of Korea. Feb, 2000
    B.S. Electrical Engineering,
    GPA: 4.00 / 4.30, Summa cum laude.

Publication

Highlights

International Conference/Symposium/Workshop Proceedings

  1. Jongmin Kim, Sungmin Yun, Hyesung Ji, Wonseok Choi, Sangpyo Kim, and Jung Ho Ahn: “Anaheim: Architecture and Algorithms for Processing Fully Homomorphic Encryption in Memory,” HPCA 2025
  2. Sungmin Yun, Kwanhee Kyung, Juhwan Cho, Jaewan Choi, Jongmin Kim, Byeongho Kim, Sukhan Lee, Kyomin Sohn, Jung Ho Ahn: “Duplex: A Device for Large Language Models with Mixture of Experts, Grouped Query Attention, and Continuous Batching,” MICRO 2024
  3. Jae Hyung Ju, Jaiyoung Park, Jongmin Kim, Minsik Kang, Donghwan Kim, Jung Hee Cheon, Jung Ho Ahn: “NeuJeans: Private Neural Network Inference with Joint Optimization of Convolution and FHE Bootstrapping,” ACM Conference on Computer and Communications Security (CCS) 2024
  4. Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn: “DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands,” ISCA 2024
  5. Yesin Ryu, Yoojin Kim, Giyong Jung, Jung Ho Ahn, Jungrae Kim: “Native DRAM Cache: Re-architecting DRAM as a Large-Scale Cache for Data Centers,” ISCA 2024
  6. Juneseo Chang, Wanju Doh, Yaebin Moon, Eojin Lee, Jung Ho Ahn: “IDT: Intelligent Data Placement for Multi-tiered Main Memory with Reinforcement Learning,” ACM International Symposium on High-Performance, Parallel and Distributed Computing (HPDC) 2024
  7. Sungmin Yun, Hwayong Nam, Kwanhee Kyung, Jaehyun Park, Byeongho Kim, Yongsuk Kwon, Eojin Lee, Jung Ho Ahn: “CLAY: CXL-based Scalable NDP Architecture Accelerating Embedding Layers,” International Conference on Supercomputing (ICS) 2024
  8. Sangpyo Kim, Jongmin Kim, Jaeyoung Choi, Jung Ho Ahn: “CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure,” International Symposium on Secure and Private Execution Environment Design (SEED) 2024
  9. Jaehyun Park, Jaewan Choi, Kwanhee Kyung, Michael Jaemin Kim, Yongsuk Kwon, Nam Sung Kim, Jung Ho Ahn: “AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference,” International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) 2024
  10. Chihun Song, Michael Jaemin Kim, Tianchen Wang, Houxiang Ji, Jinghan Huang, Ipoom Jeong, Jaehyun Park, Hwayong Nam, Minbok Wi, Jung Ho Ahn, Nam Sung Kim: “TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks,” ASPLOS 2024
  11. Sangsoo Park, KyungSoo Kim, Jinin So, Jin Jung, Jonggeon Lee, Kyoungwan Woo, Nayeon Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, Jinhyun Kim, Jieun Lee, YeonGon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, Nam Sung Kim: “An LPDDR-based CXL-PNM Platform for TCO-efficient Inference of Transformer-based Large Language Models,” HPCA 2024
  12. Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Chihun Song, Jinghan Huang, Houxiang Ji, Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim: “Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices,” MICRO 2023
  13. Michael Jaemin Kim, Minbok Wi, Jaehyun Park, Seoyoung Ko, Jaeyoung Choi, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn, Eojin Lee: “How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM,” MICRO 2023
  14. Rashmi Agrawal, Jung Ho Ahn, Flavio Bergamaschi, Ro Cammarota, Jung Hee Cheon, Fillipe D. M. de Souza, Huijing Gong, Minsik Kang, Duhyeong Kim, Jongmin Kim, Hubert de Lassus, Jai Hyun Park, Michael Steiner, Wen Wang: “High-precision RNS-CKKS on fixed but smaller word-size architectures: theory and application,” Workshop on Encrypted Computing & Applied Homomorphic Cryptography 2023
  15. Jongmin Kim, Sangpyo Kim, Jaewan Choi, Jaiyoung Park, Donghwan Kim, Jung Ho Ahn: “SHARP: A Short-Word Hierarchical Accelerator for Robust and Practical Fully Homomorphic Encryption,” ISCA 2023
  16. Minbok Wi, Jaehyun Park, Seoyoung Ko, Michael Jaemin Kim, Nam Sung Kim, Eojin Lee, Jung Ho Ahn: “SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling,” HPCA 2023
  17. Jongmin Kim, Gwangho Lee, Sangpyo Kim, Gina Sohn, Minsoo Rhu, John Kim, Jung Ho Ahn: “ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse,” MICRO 2022
  18. Jaewan Choi, Hailong Li, Byeongho Kim, Seunghwan Hwang, Jung Ho Ahn: “Accelerating Transformer Networks through Recomposing Softmax Layers,” IEEE International Symposium on Workload Characterization (IISWC) 2022
  19. Hailong Li, Jaewan Choi, Jung Ho Ahn: “A Slice and Dice Approach to Accelerate Compound Sparse Attention on GPU,” IISWC 2022
  20. Sangpyo Kim, Jongmin Kim, Michael Jaemin Kim, Wonkyung Jung, John Kim, Minsoo Rhu, Jung Ho Ahn: “BTS: An Accelerator for Bootstrappable Fully Homomorphic Encryption,” ISCA 2022
  21. Michael Jaemin Kim, Jaehyun Park, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn: “Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh,” HPCA 2022
  22. Jaehyun Park, Byeongho Kim, Sungmin Yun, Eojin Lee, Minsoo Rhu, Jung Ho Ahn: “TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory,” MICRO 2021
  23. Sungbo Park, Ingab Kang, Yaebin Moon, Jung Ho Ahn, G. Edward Suh: “BCD deduplication: effective memory compression using partial cache-line deduplication,” ASPLOS 2021
  24. Wonkyung Jung, Eojin Lee, Sangpyo Kim, Namhoon Kim, Keewoo Lee, Chohong Min, Jung Hee Cheon, Jung Ho Ahn: “Accelerating Fully Homomorphic Encryption Through Microarchitecture-Aware Analysis and Optimization,” International Symposium on Performance Analysis of Systems and Software (ISPASS) 2021
  25. Deok-Jae Oh, Yaebin Moon, Eojin Lee, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn: “MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework,” ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES) 2021
  26. Sangpyo Kim, Wonkyung Jung, Jaiyoung Park, Jung Ho Ahn: “Accelerating Number Theoretic Transformations for Bootstrappable Homomorphic Encryption on GPUs,” IISWC 2020
  27. Yeonhong Park, Woosuk Kwon, Eojin Lee, Tae Jun Ham, Jung Ho Ahn, Jae W. Lee: “Graphene: Strong yet Lightweight Row Hammer Protection,” MICRO 2020
  28. Jongwook Chung, Yuhwan Ro, Joonsung Kim, Jaehyung Ahn, Jangwoo Kim, John Kim, Jae W. Lee, Jung Ho Ahn: “Enforcing Last-Level Cache Partitioning through Memory Virtual Channels,” PACT 2019
  29. Eojin Lee, Ingab Kang, Sukhan Lee, G. Edward Suh, Jung Ho Ahn: “TWiCe: Preventing Row-hammering by Exploiting Time Window Counters,” ISCA 2019
  30. Wonkyung Jung, Daejin Jung, Byeongho Kim, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn: “Restructuring Batch Normalization to Accelerate CNN Training,” Conference on Machine Learning and Systems (MLSys) 2019
  31. Sukhan Lee, Kiwon Lee, Min Chul Sung, Mohammad Alian, Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O, Jung Ho Ahn, Nam Sung Kim: “3D-Xpath: high-density managed DRAM architecture with cost-effective alternative paths for memory transactions,” PACT 2018
  32. Grant Ayers, Jung Ho Ahn, Christos Kozyrakis, Parthasarathy Ranganathan: “Memory Hierarchy for Web Search,” HPCA 2018
  33. WonJun Song, Gwangsun Kim, Hyungjoon Jung, Jongwook Chung, Jung Ho Ahn, Jae W. Lee, John Kim: “History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers,” ASPLOS 2017
  34. Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim: “Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices,” HPCA 2017
  35. Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn, Jae W. Lee: “SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures,” HPCA 2017
  36. Sukhan Lee, Yuhwan Ro, Young Hoon Son, Hyunyoon Cho, Nam Sung Kim, Jung Ho Ahn: “Understanding power-performance relationship of energy-efficient modern DRAM devices,” IISWC 2017
  37. Eojin Lee, Jongwook Chung, Daejin Jung, Sukhan Lee, Sheng Li, Jung Ho Ahn: “Work as a team or individual: Characterizing the system-level impacts of main memory partitioning,” IISWC 2017
  38. Hadi Asghari Moghaddam, Young Hoon Son, Jung Ho Ahn, Nam Sung Kim: “Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems,” MICRO 2016
  39. Byungchul Hong, Gwangsun Kim, Jung Ho Ahn, Yongkee Kwon, Hongsik Kim, John Kim: “Accelerating Linked-list Traversal Through Near-Data Processing,” PACT 2016
  40. Jinho Lee, Jung Ho Ahn, Kiyoung Choi: “Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic,” Design Automation and Test in Europe (DATE) 2016
  41. Byungchul Hong, Yongkee Kwon, Jung Ho Ahn, John Kim: “Adaptive and flexible key-value stores through soft data partitioning,” IEEE International Conference on Computer Design (ICCD) 2016
  42. Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim: “NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules,” HPCA 2015
  43. Hao Wang, Chang-Jae Park, Gyungsu Byun, Jung Ho Ahn, Nam Sung Kim: “Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems,” HPCA 2015
  44. Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn: “CiDRA: A cache-inspired DRAM resilience architecture,” HPCA 2015
  45. Ke Chen, Sheng Li, Jung Ho Ahn, Naveen Muralimanohar, Jishen Zhao, Cong Xu, Seongil O, Yuan Xie, Jay B. Brockman, Norman P. Jouppi: “History-Assisted Adaptive-Granularity Caches (HAAG$) for High Performance 3D DRAM Architectures,” ICS 2015
  46. Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey: “Architecting to achieve a billion requests per second throughput on a single key-value store server platform,” ISCA 2015
  47. Seongil O, Young Hoon Son, Nam Sung Kim, Jung Ho Ahn: “Row-buffer decoupling: A case for low-latency DRAM microarchitecture,” ISCA 2014
  48. Young Hoon Son, Seongil O, Hyunggyun Yang, Daejin Jung, Jung Ho Ahn, John Kim, Jangwoo Kim, Jae W. Lee: “Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems,” SC 2014
  49. Gwangsun Kim, John Kim, Jung Ho Ahn, Jaeha Kim: “Memory-centric system interconnect design with Hybrid Memory Cubes,” PACT 2013
  50. Daniel W. Chang, Young Hoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael J. Schulte, Nam Sung Kim: “Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os,” International Conference on Computer-Aided Design(ICCAD) 2013
  51. Young Hoon Son, Seongil O, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn: “Reducing Memory Access Latency with Asymmetric DRAM Bank Organizations,” ISCA 2013
  52. Jung Ho Ahn, Sheng Li, Seongil O, Norman P. Jouppi: “McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling,” ISPASS 2013
  53. Ke Chen, Sheng Li, Naveen Muralimanohar, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi: “CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory,” DATE 2012
  54. Jung Ho Ahn, Sungwoo Choo, John Kim: “Network within a network approach to create a scalable high-radix router microarchitecture,” HPCA 2012
  55. Sheng Li, Doe Hyun Yoon, Ke Chen, Jishen Zhao, Jung Ho Ahn, Jay B. Brockman, Yuan Xie, Norman P. Jouppi: “MAGE: adaptive granularity and ECC for resilient and power efficient memory systems,” SC 2012
  56. Young-Geun Choi, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn: “Matching Cache Access Behavior and Bit Error Pattern for High Performance Low Vcc L1 Cache,” Design Automation Conference (DAC) 2011
  57. Dongki Kim, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn, Hyunuk Jung: “A quantitative analysis of performance benefits of 3D die stacking on mobile and embedded SoC,” DATE 2011
  58. Sheng Li, Ke Chen, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi: “CACTI-P: Architecture-level modeling for SRAM-based structures with advanced leakage reduction techniques,” ICCAD 2011
  59. Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn: “The Role of Optics in Future High Radix Switch Design,” ISCA 2011
  60. Jinho Lee, Mingyang Zhu, Kiyoung Choi, Jung Ho Ahn, Rohit Sharma: “3D network-on-chip with wireless links through inductive coupling,” International SoC Design Conference (ISOCC) 2011
  61. Hyunhee Kim, Jung Ho Ahn, Jihong Kim: “Replication-aware Leakage Management in Chip Multiprocessors with Private L2 Cache,” ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) 2010
  62. Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi: “McPAT: an Integrated Power, Area, and Timing Modeling Framework for Multicore and Manycore Architectures,” MICRO 2009
  63. Jung Ho Ahn, Nathan L. Binkert, Al Davis, Moray McLaren, Robert S. Schreiber: “HyperX: Topology, Routing, and Packaging of Efficient Large-scale Networks,” SC 2009
  64. Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber: “Future Scaling of Processor-memory Interfaces,” SC 2009
  65. Raymond G. Beausoleil, Jung Ho Ahn, Nathan L. Binkert, Al Davis, David Fattal, Marco Fiorentino, Norman P. Jouppi, Moray McLaren, Charles M. Santori, Robert S. Schreiber, S. M. Spillane, Dana Vantrease, Qianfan Xu: “A Nanophotonic Interconnect for High-Performance Many-Core Computation,” Hot Interconnects 2008
  66. Shyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi: “A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies,” ISCA 2008
  67. Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn: “Corona: System Implications of Emerging Nanophotonic Technology,” ISCA 2008
  68. Mattan Erez, Jung Ho Ahn, Jayanth Gummaraju, Mendel Rosenblum, William J. Dally: “Executing Irregular Scientific Applications on Stream Architectures,” ICS 2007
  69. Jung Ho Ahn, Mattan Erez, William J. Dally: “Tradeoff between Data-, Instruction-, and Thread-level Parallelism in Stream Processors,” ICS 2007
  70. Jung Ho Ahn, Mattan Erez, William J. Dally: “The Design Space of Data-parallel Memory Systems,” SC 2006
  71. Jung Ho Ahn, Mattan Erez, William J. Dally: “Scatter-Add in Data Parallel Architectures,” HPCA 2005
  72. Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William J. Dally: “Stream Register Files with Indexed Access,” HPCA 2004
  73. Jung Ho Ahn, William J. Dally, Brucek Khailany, Ujval J. Kapasi, Abhishek Das: “Evaluating the Imagine Stream Architecture,” ISCA 2004
  74. Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. Dally, Eric Darve: “Analysis and Performance Results of a Molecular Modeling Application on Merrimac,” SC 2004
  75. William J. Dally, Francois Labonte, Abhishek Das, Pat Hanrahan, Jung Ho Ahn, Jayanth Gummaraju, Mattan Erez, Nuwan Jayasena, Ian Buck, Timothy J. Knight, Ujval J. Kapasi: “Merrimac: Supercomputing with Streams,” SC 2003

International Journals/Magazine Articles

  1. Hyesung Ji, Sangpyo Kim, Jaewan Choi, Jung Ho Ahn: “Accelerating Programmable Bootstrapping Targeting Contemporary GPU Microarchitecture,” IEEE CAL 2024
  2. Sungmin Yun, Hwayong Nam, Jaehyun Park, Byeongho Kim, Jung Ho Ahn, Eojin Lee: “GraNDe: Efficient Near-Data Processing Architecture for Graph Neural Networks,” IEEE Transactions on Computers (TC) 2024
  3. Donghwan Kim, Jaiyoung Park, Jongmin Kim, Sangpyo Kim, Jung Ho Ahn: “HyPHEN: A Hybrid Packing Method and Its Optimizations for Homomorphic Encryption-Based Neural Networks,” IEEE Access 2024
  4. Yaebin Moon, Wanju Doh, Kwanhee Kyung, Eojin Lee, Jung Ho Ahn: “ADT: Aggressive Demotion and Promotion for Tiered Memory,” IEEE CAL 2023
  5. Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn: “X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands,” IEEE CAL 2023
  6. Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn: “Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models,” IEEE CAL 2023
  7. Hailong Li, Jaewan Choi, Yongsuk Kwon, Jung Ho Ahn: “A Hardware-Friendly Tiled Singular-Value Decomposition-Based Matrix Multiplication for Transformer-Based Models,” IEEE CAL 2023
  8. Deok-Jae Oh, Yaebin Moon, Do Kyu Ham, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn, Eojin Lee: “MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation,” ACM Transactions on Embedded Computing Systems 2023
  9. Sungmin Yun, Byeongho Kim, Jaehyun Park, Hwayong Nam, Jung Ho Ahn, Eojin Lee: “GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks,” IEEE CAL 2022
  10. Sunjung Lee, Seunghwan Hwang, Michael Jaemin Kim, Jaewan Choi, Jung Ho Ahn: “Future Scaling of Memory Hierarchy for Tensor Cores and Eliminating Redundant Shared Memory Traffic Using Inter-Warp Multicasting,” IEEE TC 2022
  11. Sunjung Lee, Jaewan Choi, Wonkyung Jung, Byeongho Kim, Jaehyun Park, Hweesoo Kim, Jung Ho Ahn: “MVP: An Efficient CNN Accelerator with Matrix, Vector, and Processing-Near-Memory Units,” ACM Transactions on Design Automation of Electronic Systems (TODAES) 2022
  12. Wonkyung Jung, Eojin Lee, Sangpyo Kim, Jongmin Kim, Namhoon Kim, Keewoo Lee, Chohong Min, Jung Hee Cheon, Jung Ho Ahn: “Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization,” IEEE Access 2021
  13. Byeongho Kim, Jaehyun Park, Eojin Lee, Minsoo Rhu, Jung Ho Ahn: “TRiM: Tensor Reduction in Memory,” IEEE CAL 2021
  14. Hweesoo Kim, Sunjung Lee, Jaewan Choi, Jung Ho Ahn: “Row-Streaming Dataflow Using a Chaining Buffer and Systolic Array+ Structure,” IEEE CAL 2021
  15. Wonkyung Jung, Sangpyo Kim, Jung Ho Ahn, Jung Hee Cheon, Younho Lee: “Over 100x Faster Bootstrapping in Fully Homomorphic Encryption through Memory-centric Optimization with GPUs,” IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES) 2021
  16. Ingab Kang, Eojin Lee, Jung Ho Ahn: “CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention,” IEEE Access 2020
  17. Byeongho Kim, Jongwook Chung, Eojin Lee, Wonkyung Jung, Sunjung Lee, Jaewan Choi, Jaehyun Park, Minbok Wi, Sukhan Lee, Jung Ho Ahn: “MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks,” IEEE TC 2020
  18. Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, Jung Ho Ahn: “Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices,” IEEE Access 2018
  19. Daejin Jung, Sunjung Lee, Wonjong Rhee, Jung Ho Ahn: “Partitioning Compute Units in CNN Acceleration for Statistical Memory Traffic Shaping,” IEEE CAL 2018
  20. Eojin Lee, Sukhan Lee, G. Edward Suh, Jung Ho Ahn: “TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering,” IEEE CAL 2018
  21. WonJun Song, Hyungjoon Jung, Jung Ho Ahn, Jae W. Lee, John Kim: “Evaluation of Performance Unfairness in NUMA System Architecture,” IEEE CAL 2017
  22. Young Hoon Son, Hyunyoon Cho, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn: “SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture,” IEEE CAL 2017
  23. Yuhwan Ro, Min Chul Sung, Yongjun Park, Jung Ho Ahn: “Selective DRAM cache bypassing for improving bandwidth on DRAM/NVM hybrid main memory systems,” IEICE Electronics Express (ELEX) 2017
  24. Jinho Lee, Jongwook Chung, Jung Ho Ahn, Kiyoung Choi: “Excavating the Hidden Parallelism Inside DRAM Architectures With Buffered Compares,” IEEE Transactions on Very Large Scale Integrated Systems (TVLSI) 2017
  25. Daejin Jung, Sheng Li, Jung Ho Ahn: “Large Pages on Steroids: Small Ideas to Accelerate Big Memory Applications,” IEEE CAL 2016
  26. Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, Nam Sung Kim: “Exploring new features of high-bandwidth memory for GPUs,” IEICE ELEX 2016
  27. Hadi Asghari Moghaddam, Amin Farmahini Farahani, Katherine Morrow, Jung Ho Ahn, Nam Sung Kim: “Near-DRAM Acceleration with Single-ISA Heterogeneous Processing in Standard Memory Modules,” IEEE Micro 2016
  28. Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey: “Achieving One Billion Key-Value Requests per Second on a Single Server,” IEEE Micro 2016
  29. Sheng Li, Hyeontaek Lim, Victor W. Lee, Jung Ho Ahn, Anuj Kalia, Michael Kaminsky, David G. Andersen, Seongil O, Sukhan Lee, Pradeep Dubey: “Full-Stack Architecting to Achieve a Billion-Requests-Per-Second Throughput on a Single Key-Value Store Server Platform,” ACM Transactions on Computer Systems 2016
  30. Seongil O, Sanghyuk Kwon, Young Hoon Son, Yujin Park, Jung Ho Ahn: “CIDR: A Cache Inspired Area-Efficient DRAM Resilience Architecture against Permanent Faults,” IEEE CAL 2015
  31. Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim: “DRAMA: An Architecture for Accelerated Processing Near Memory,” IEEE CAL 2015
  32. Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi: “The McPAT Framework for Multicore and Manycore Architectures: Simultaneously Modeling Power, Area, and Timing,” ACM Transactions on Architecture and Code Optimization (TACO) 2013
  33. Jung Ho Ahn, Young Hoon Son, John Kim: “Scalable High-radix Router Microarchitecture Using a Network Switch Organization,” ACM TACO 2013
  34. Jinho Lee, Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu, Jung Ho Ahn, Kiyoung Choi: “Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2013
  35. Young-Geun Choi, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn, Kangmin Lee: “MAEPER: Matching Access and Error Patterns With Error-Free Resource for Low Vcc L1 Cache,” IEEE TVLSI 2013
  36. Hyunhee Kim, Jung Ho Ahn, Jihong Kim: “Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs,” IEEE TVLSI 2013
  37. Jung Ho Ahn: “ccTSA: A Coverage-Centric Threaded Sequence Assembler,” PLoS ONE 2012
  38. Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn: “Optical High Radix Switch Design,” IEEE Micro 2012
  39. Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber: “Improving System Energy Efficiency with Memory Rank Subsetting,” ACM TACO 2012
  40. Jung Ho Ahn, Jacob Leverich, Robert S. Schreiber, Norman P. Jouppi: “Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs,” IEEE CAL 2009
  41. Matteo Monchiero, Jung Ho Ahn, Ayose Falcón, Daniel Ortega, Paolo Faraboschi: “How to Simulate 1000 Cores,” SIGARCH Computer Architecture News 2009
  42. Jung Ho Ahn, William J. Dally: “Data parallel address architecture,” IEEE CAL 2006
  43. William J. Dally, Ujval J. Kapasi, Brucek Khailany, Jung Ho Ahn, Abhishek Das: “Stream Processors: Programmability and Efficiency,” ACM Queue 2004
  44. Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter R. Mattson, John D. Owens: “Programmable Stream Processors,” Computer 2003

Technical Reports

  1. Shyamkumar Thoziyoor, Naveen Muralimanohar, Jung Ho Ahn, Norman P. Jouppi: “CACTI 5.1,” Technical Report HPL-2008-20, HP Labs, 2008

Patents

  1. Moray McLaren, Jung Ho Ahn, Nathan L. Binkert, Al Davis, Robert S. Schreiber, “Methods and Apparatus to Determine and Implement Multidimensional Network Topologies,” US8427980B2, 2013
  2. Moray McLaren, Jung Ho Ahn, Al Davis, Nathan L. Binkert, Norman P. Jouppi, “Three-Dimensional Memory Module Architectures,” US8059443B2, 2011
  3. Nathan L. Binkert, Norman P. Jouppi, Robert S. Schreiber, Jung Ho Ahn, Moray McLaren, “Synchronous Optical Bus Providing Communication between Computer System Components,” US8032033B2, 2011
  4. Jung Ho Ahn, Changsoon Kim, “Optical Waveguide Devices,” KR Patent 10-1265754, 2013
  5. Jung Ho Ahn, Nathan L. Binkert, Al Davis, Moray McLaren, Robert S. Schreiber, “Incremental Adaptive Packet Routing In a Multi-Dimensional Network,” US8537677B2, 2013
  6. Nathan L. Binkert, Norman P. Jouppi, R. S. Screiber, Jung Ho Ahn, “Intentionally Skewed Optical Clock Signal Distribution,” US8543005B2, 2013
  7. Jung Ho Ahn, Norman P. Jouppi, Jacob Leverich, “Independently Controlled Virtual Memory Devices In Memory Modules,” US8788747B2, 2014
  8. Jung Ho Ahn, Moray McLaren, Al Davis, “Two-phase Optical Communication Methods And Optical Bus Systems For Implementing The Same,” US8805189B2, 2014
  9. Jung Ho Ahn, Norman P. Jouppi, Jacob Leverich, Robert S. Schreiber, “Dynamic Utilization of Power-Down Modes in Multi-Core Memory Modules,” US8812886B2, 2014
  10. Michael Tan, Nathan L. Binkert, Norman P. Jouppi, Moray McLaren, Jung Ho Ahn, “Circuit Switched Optical Interconnection Fabric,” US8885991B2, 2014
  11. Jung Ho Ahn Norman P. Jouppi, Robert S. Schreiber, “Independently Controllable And Reconfigurable Virtual Memory Devices In Memory Modules That Are Pin-compatible With Standard Memory Modules,” US8924639B2, 2014
  12. Moray McLaren, Jung Ho Ahn, Nathan L. Binkert, Al Davis, Norman P. Jouppi, “Optoelectronic Switches Using On-chip Optical Waveguides,” US8938139B2, 2015
  13. Jung Ho Ahn, Mattan Erez, William J. Dally, “Atomic Memory Access Hardware Implementations,” US8959292, 2015
  14. Young Hoon Son, Jung Ho Ahn, “Memory Device, Memory Module Including the Same, and Memory System Including the Same,” US9767887, 2017
  15. Jung Ho Ahn, Nam Sung Kim, “Memory System and Method for Error Correction of Memory,” US9886340B2, 2018
  16. Sanghyuk Kwon, Young Hoon Son, Jung Ho Ahn, “Semiconductor memory device and memory system including the same,” US10134487B2, 2018
  17. Seongil O, Nam Sung Kim, Young Hoon Son, Chankyung Kim, Hoyoung Song, Jung Ho Ahn, Sangjoon Hwang, “Memory Module, Memory Device, and Processing Device Having a Processor Mode, and Memory System,” US10416896B2, 2019
  18. Byungchul Hong, John Kim, Jung Ho Ahn, Yongkee Kwon, Hongsik Kim, “Memory Device Performing Near-data Processing Using a Plurality of Data Processing Engines that Independently Perform Data Processing Operations, and System Including the Same,” US10430353B2, 2019
  19. Sanghyuk Kwon, Young Hoon Son, Jung Ho Ahn, “Memory Device and Memory System Including the Same,” KR Patent 10-2269899, 2021
  20. Eojin Lee, Ingab Kang, Jung Ho Ahn, “Row Hammer Prevention Circuit, a Memory Module Including the Row Hammer Prevention Circuit, and a Memory System Including the Memory Module,” US11037618B2, 2021
  21. Seungwoo Seo, Byeongho Kim, Jaehyun Park, Jung Ho Ahn, Minbok Wi, Sunjung Lee, Eojin Lee, Wonkyung Jung, Jongwook Chung, Jaewan Choi “Semiconductor memory device employing processing in memory (PIM) and operation method of the semiconductor memory device,” US11139033B2, 2021
  22. Seongil O, Nam Sung Kim, Young Hoon Son, Chankyung Kim, Hoyoung Song, Jung Ho Ahn, Sangjoon Hwang, “Memory Module Having a Processor Mode and Processing Data buffer,” KR Patent 10-2336294, 2021
  23. Seongil O, Nam Sung Kim, Young Hoon Son, Chankyung Kim, Hoyoung Song, Jung Ho Ahn, Sangjoon Hwang, “Memory Module, Memory Device, and Processing Device Having a Processor Mode, and Memory System,” US11169711B2, 2021
  24. Seung Wook Lee, Hweesoo Kim, Jung Ho Ahn, “Accelerator and Electronic Device Including the Same,” US11436168B2, 2022
  25. Yuhwan Ro, Byeongho Kim, Jaehyun Park, Jung Ho Ahn, Minbok Wi, Sunjung Lee, Eojin Lee, Wonkyung Jung, Jongwook Chung, Jaewan Choi, “Method and Apparatus with Data Processing,” US11436477B2, 2022
  26. Dongyoung Kim, Jung Ho Ahn, Sunjung Lee, Jaewan Choi, “Neural Processor,” US11544213B2, 2023
  27. Hoon Shin, Yeonhong Park, Jae W. Lee, Eojin Lee, Woosuk Kwon, Jung Ho Ahn, Taejun Ham “Hammer Refresh Row Address Detector, and Semiconductor Memory Device and Memory Module Including the Same,” US11568917B1, 2023
  28. Seung Wook Lee, Hweesoo Kim, Jung Ho Ahn, “Accelerator and Electronic Device Including the Same,” US11966344B2, 2024

Teaching

Professor @ SNU

  • Principles and Practices of MPSoC Design (493.701)
  • Introduction to Convergence Science and Technology (490.501)
  • Theory and Practice in Intelligent Convergence Systems (493.501)
  • Digital Hardware Design (493.606)
  • Computer Interconnection Networks (493.612)
  • Advanced Computer Architecture (4541.571)
  • Core Software (493.607)
  • Topics in Computer and VLSI (4541.659)
  • Core Digital Hardware (493.606A)
  • Computer Organization (430.322)
  • Digital Systems Design and Experiments (430.315A)
  • A Holistic Approach to Datacenter Architecture (M2681.000400-001)
  • Computer Architectures for Artificial Intelligence (M3309.001000)
  • Programming Methodology (430.211)
  • Computer Organization and Design (430.636)

Lecturer @ Stanford University

  • Advanced Computer Organization: Interconnection Networks (EE382C), 2009

Professional Activities

Technical Program Committee Vice Chair

  • SC16, Architecture and Networks Area

Technical Program Committee

  • ASPLOS 2022/2023/2024
  • ISCA 2016/2017/2020/2023/2024/2025
  • MICRO 2013/2016/2017/2020/2021/2022/2023/2024
  • HPCA 2023/2024/2025
  • SC09/11/15/17/19/21
  • IEEE Micro Top Picks 2017/2023/2024/2025
  • DATE 2010/2011/2012/2013/2014/2015/2018/2019
  • ICS 2010
  • HiPEAC (High Performance Embedded Architectures and Compilers) 2011
  • NOCS (International Symposium on Networks-on-Chip) 2013/2014/2015
  • IPDPS (International Parallel & Distributed Processing Symposium) 2015/2016/2017/2018
  • SIES (IEEE Symposium on Industrial Embedded Systems) 2014/2015
  • CF (Computing Frontiers) 2012
  • SBAC-PAD (International Symposium on Computer Architecture and High Performance Computing) 2015
  • HiPC (International Conference on High Performance Computing) 2015
  • ICPADS (International Conference on Parallel and Distributed Systems) 2011
  • NAS (Networking, Architecture, and Storage) 2017
  • The Memory Forum 2014 (@ISCA 2014)
  • The Workshop on Near-Data Processing 2015 (@MICRO 2015)
  • ACM Student Research Competition (SRC) (@MICRO 2018)

General Co-Chair

Workshop Co-Chair

  • Third Workshop on DRAM Security (DRAMSec) (@ISCA 2023)

Organizing Committee

  • ISCA 2023
  • PACT 2015
  • ICPADS (IEEE International Conference on Parallel and Distributed Systems) 2013
  • ITC-CSCC (International Technical Conference on Circuits/Systems, Computers and Communications) 2011

Technical Referee

  • MICRO 2007/2008/2012/2014/2015
  • PACT 2008/2012
  • HPCA 2008/2012/2013/2014/2015/2018/2019/2020
  • ISCA 2010/2013/2014/2019/2021/2022
  • ASPLOS 2025
  • ISCAS (IEEE International Symposium on Circuits and Systems) 2014/2015
  • ACM SIGMETRICS 2013
  • DAC 2013
  • ACM Journal of Emerging Technologies
  • ACM TACO
  • ACM Transactions on Embedded Computing Systems
  • ACM Transactions on Reconfigurable Technology and Systems
  • Bioinformatics
  • Communications of the ACM
  • Elsevier Parallel Computing
  • Elsevier Integration, the VLSI Journal
  • IET Computers & Digital Techniques
  • IEEE/ACM Transactions on Networking
  • IEEE Access
  • IEEE CAL
  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems
  • IEEE Micro Magazine
  • IEEE Transactions on Circuits and Systems I
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • IEEE TC
  • IEEE Transactions on Emerging Topics in Computing
  • IEEE Transactions on Parallel and Distributed Systems
  • IEEE Transactions on Very Large Scale Integration Systems
  • Journal of Parallel and Distributed Computing
  • Journal of Computing Science and Engineering
  • PLoS ONE

Editorial Board

  • IEEE TC, Associate Editor (2024 – )
  • MDPI Electronics, Computer Science & Engineering Section Board Member (2018 – 2021)

Community Service

  • Founding Chair, Korea ACM SIGARCH Chapter, 2014/2015

Academic Society Membership

  • IEEE Senior Member (IEEE Computer Society, TCCA/TCuARCH)
  • ACM Member (ACM SIGARCH/SIGMICRO)